A low-power and high-speed equalizer for magnetic storage read channels

Author

Ndjountche, T. ; Unbehauen, Rolf

Author_Institution

Erlangen-Nurnberg Univ., Germany

Volume

1

fYear

2001

fDate

6-9 May 2001

Firstpage

240

Abstract

Design techniques for read channel equalizers used in magnetic recording systems are presented. The equalization is based on a multi-level dual decision feedback architecture. The signal processing at low power and high speed is realized by using a continuous-time adaptive forward filter with an infinite impulse response. Furthermore, circuit structures with reduced offset-voltage sensitivities are developed for the equalizer implementation. As a result, the data rate in the intended application can be greater than 200 Mbits/s

Keywords

CMOS analogue integrated circuits; IIR filters; adaptive equalisers; adaptive filters; analogue processing circuits; continuous time filters; decision feedback equalisers; digital magnetic recording; high-speed integrated circuits; integrated circuit design; low-power electronics; 200 Mbit/s; 500 mW; analog discrete-time implementation; continuous-time adaptive forward filter; design techniques; high-speed equalizer; infinite impulse response; low-power equalizer; magnetic recording systems; magnetic storage read channels; multi-level dual decision feedback architecture; offset-voltage sensitivities; Adaptive equalizers; Adaptive filters; Circuits; Decision feedback equalizers; Finite impulse response filter; IIR filters; Magnetic memory; Magnetic recording; Magnetic separation; Sampling methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.921835

Filename

921835