• DocumentCode
    1745135
  • Title

    Structural testing of pipelined analog to digital converters

  • Author

    Peralías, Eduardo J. ; Rueda, Adoración ; Huertas, José L.

  • Author_Institution
    Inst. de Microelectron., Seville Univ., Spain
  • Volume
    1
  • fYear
    2001
  • fDate
    6-9 May 2001
  • Firstpage
    436
  • Abstract
    This paper presents two alternative BIST schemes for structural testing of pipelined ADCs. The operational principle of both strategies relies on testing each of the ADC stages reconfigured as an A/D-D/A block and applying as input a set of analog values. These values are DC stimuli giving a simple output signature. The new techniques are intended for being used in pipelined converters of an arbitrary number of conversion stages and with a digital self-correction mechanism
  • Keywords
    analogue-digital conversion; built-in self test; integrated circuit testing; pipeline processing; redundancy; A/D-D/A block; BIST schemes; DC stimuli; analog valued input; arbitrary number of conversion stages; digital self-correction mechanism; hardware redundancy; operational principle; pipelined ADC; simple output signature; structural testing; Analog-digital conversion; Built-in self-test; Controllability; Costs; Electric variables measurement; Electrical fault detection; Performance evaluation; Production; Test equipment; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
  • Conference_Location
    Sydney, NSW
  • Print_ISBN
    0-7803-6685-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2001.921886
  • Filename
    921886