DocumentCode
1745146
Title
Area efficient CMOS charge pump circuits
Author
Perigny, Ryan ; Un-Ku Moon ; Temes, Gabor
Author_Institution
Conexant Syst. Inc., Fort Collins, CO, USA
Volume
1
fYear
2001
fDate
6-9 May 2001
Firstpage
492
Abstract
This paper describes the operation of three types of charge pump circuits. Power efficiency theory of charge pumps is discussed. A method of estimating the output ripple of a charge pump from the size of the capacitors used is described. A new charge pump circuit that uses two cascoded buffer transistors to improve the area efficiency is proposed
Keywords
CMOS analogue integrated circuits; convertors; integrated circuit design; CMOS charge pump circuits; area efficiency improvement; area efficient charge pump circuits; capacitor size; cascoded buffer transistors; double cascode charge pump; output ripple estimation; power efficiency theory; Capacitance; Charge pumps; Clocks; Costs; DRAM chips; Degradation; Dynamic voltage scaling; EPROM; Switched capacitor circuits; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921900
Filename
921900
Link To Document