A 1.1 V low-power ΣΔ modulator for 14-b 16 kHz A/D conversion

Author

Muñoz, F. ; VegaLeal, A.P. ; Carvajal, R.G. ; Torralba, Antonio ; Tombs, J. ; Angulo, J. Ramírez

Author_Institution

Dept. de Ingegneria Electron., Seville Univ., Spain

Volume

1

fYear

2001

fDate

6-9 May 2001

Firstpage

619

Abstract

This paper presents a second order ΣΔ modulator implementation for a supply voltage of 1.1 V. A new fully-differential CMOS operational amplifier has been designed in order to achieve high-resolution under very-low-voltage operation. The design relies on the elimination of critical switches by using a voltage doubler. The modulator has been implemented using the AMS CDS 0.35 μm CMOS technology and postlayout simulations have been performed. These simulations showed 14 bits of resolution with an oversampling ratio of 166

Keywords

CMOS integrated circuits; differential amplifiers; low-power electronics; operational amplifiers; sigma-delta modulation; 0.35 micron; 1.1 V; 14 bit; 16 kHz; A/D conversion; AMS CDS CMOS technology; fully-differential CMOS operational amplifier; low-power sigma-delta modulator; oversampling ratio; postlayout simulations; resolution; very-low-voltage operation; voltage doubler; Capacitors; Clocks; Delta modulation; Delta-sigma modulation; Hysteresis; Jitter; Operational amplifiers; Performance gain; Sampling methods; Strontium;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.921932

Filename

921932