Title :
Statistical analysis of the time-delay digital tanlock loop in the presence of Gaussian noise
Author :
Hussain, Zahir M. ; Boashash, Boualem
Author_Institution :
Signal Processing Res. Centre, Queensland Univ. of Technol., Brisbane, Qld., Australia
Abstract :
In this work we analyze the performance of the newly proposed digital tanlock loop in the presence of additive Gaussian noise. It is shown that the expected value of the steady-state phase errors at the input and the output of the phase error detector are equal to the noise-free steady-state values, while the variance is significantly reduced when the signal-to-noise ratio is increased or the phase shift (introduced by the time-delay) approaches 90-degrees
Keywords :
Gaussian noise; circuit noise; delay lock loops; digital phase locked loops; statistical analysis; additive Gaussian noise; phase error detector; phase shift; signal-to-noise ratio; statistical analysis; steady-state phase error; time-delay digital tanlock loop; variance; Additive noise; Detectors; Gaussian noise; Noise reduction; Performance analysis; Phase detection; Phase noise; Signal to noise ratio; Statistical analysis; Steady-state;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.922158
