Title :
A wideband digital frequency synthesizer
Author :
Liu, Yi-Chuan ; Wang, Chting-Cheng ; Terng-Yin Hsu ; Lee, Chen-Yi
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
With the rapid advance in CMOS technology, the trend of the VLSI then towards system-on-chip (SOC) where design methodology, cost, and turnaround time are major issues. Concepts of intellectual property (IP) are then proposed to fit for SOC designs. Based on a DFS controller IP, a wideband digital frequency synthesizer (DFS) is proposed to fit in with the wireless LAN applications, which provides low cost and efficient design periods. A 2-stage voltage-controlled oscillator (VCO) is designed to achieve the system requirements and generates such a high-speed frequency. Its output frequency range can be from 465 MHz to 2.635 GHz with double 3.0-V supplies. Besides, a novel cell-based digital-to-voltage converter (DVC) is also proposed to solve the interface between the DFS controller IP and the VCO. The wideband DFS is fabricated in 0.35-um SPQM CMOS technology
Keywords :
CMOS digital integrated circuits; digital-analogue conversion; frequency synthesizers; industrial property; voltage-controlled oscillators; 0.35 micron; 3.0 V; 465 MHz to 2.635 GHz; DFS controller IP; SPQM CMOS technology; VLSI design; differential delay cell; digital-controlled oscillator; digital-to-voltage converter; high-speed voltage-controlled oscillator; intellectual property; system-on-chip; two-stage high-speed ring oscillator; wideband digital frequency synthesizer; wireless LAN transceiver; CMOS technology; Costs; Design methodology; Frequency synthesizers; Intellectual property; System-on-a-chip; Very large scale integration; Voltage-controlled oscillators; Wideband; Wireless LAN;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.922336
