Power optimization of CMOS LC VCOs

Author

Hsieh, Ming-ta ; Harvey, Jackson ; Harjani, Ramesh

Author_Institution

Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA

Volume

4

fYear

2001

fDate

6-9 May 2001

Firstpage

718

Abstract

A technique is presented for the minimization of power consumption in a LC tank voltage-controlled oscillator for low-power wireless systems, such as wireless sensors. This technique involves finding the power constraints for a given inductor design, and then making an optimal tradeoff between inductor series resistance and stray capacitance. The technique and the analytic model are then used to optimize the power consumption of an LC oscillator. The oscillator performance is verified via simulation. The simulated performance matches the predicted performance well. Optimized designs using this technique can result in 100% or more reduction of power in comparison to sub-optimal design

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; inductors; low-power electronics; transceivers; voltage-controlled oscillators; CMOS LC VCOs; LC tank voltage-controlled oscillator; inductor design; low-power wireless systems; power constraints; power consumption; power consumption minimisation; series resistance; stray capacitance; wireless sensors; Capacitance; Design optimization; Energy consumption; Frequency; Inductors; Phase noise; Spirals; Varactors; Voltage-controlled oscillators; Wireless sensor networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.922338

Filename

922338