DocumentCode
1745358
Title
An application specific multi-port RAM cell circuit for register renaming units in high speed microprocessors
Author
De Gloria, Alessandro ; Olivieri, Mauro
Author_Institution
Genoa Univ., Italy
Volume
4
fYear
2001
fDate
6-9 May 2001
Firstpage
934
Abstract
We present a novel custom circuit for superscalar microprocessor renaming unit and compare its performance with a conventional design, referring to an industrial 0.35 μm CMOS process. Speed and power consumption are significantly improved
Keywords
CMOS digital integrated circuits; application specific integrated circuits; cellular arrays; high-speed integrated circuits; low-power electronics; microprocessor chips; multiport networks; random-access storage; 0.35 micron; CMOS process; application specific multi-port RAM cell circuit; circuit speed; custom circuit; high speed microprocessors; power consumption; register renaming units; superscalar microprocessor renaming unit; CMOS process; Circuits; Clocks; Decoding; Energy consumption; Microprocessors; Pipelines; Random access memory; Read-write memory; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.922392
Filename
922392
Link To Document