DocumentCode
174652
Title
Power-capped DVFS and thread allocation with ANN models on modern NUMA systems
Author
Imamura, Shun´ichi ; Sasaki, Hiromu ; Inoue, Ken ; Nikolopoulos, Dimitrios S.
Author_Institution
Grad. Sch. & Fac. of Inf. Sci. & Electr. Eng., Kyushu Univ., Fukuoka, Japan
fYear
2014
fDate
19-22 Oct. 2014
Firstpage
324
Lastpage
331
Abstract
Power capping is an essential function for efficient power budgeting and cost management on modern server systems. Contemporary server processors operate under power caps by using dynamic voltage and frequency scaling (DVFS). However, these processors are often deployed in non-uniform memory access (NUMA) architectures, where thread allocation between cores may significantly affect performance and power consumption. This paper proposes a method which maximizes performance under power caps on NUMA systems by dynamically optimizing two knobs: DVFS and thread allocation. The method selects the optimal combination of the two knobs with models based on artificial neural network (ANN) that captures the nonlinear effect of thread allocation on performance. We implement the proposed method as a runtime system and evaluate it with twelve multithreaded benchmarks on a real AMD Opteron based NUMA system. The evaluation results show that our method outperforms a naive technique optimizing only DVFS by up to 67.1%, under a power cap.
Keywords
microprocessor chips; network servers; neural nets; AMD Opteron; ANN models; DVFS; NUMA systems; artificial neural network; contemporary server processors; cost management; dynamic voltage and frequency scaling; nonuniform memory access; power budgeting; power capping; power caps; server systems; Artificial neural networks; Benchmark testing; Instruction sets; Linux; Power demand; Predictive models; Resource management;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design (ICCD), 2014 32nd IEEE International Conference on
Conference_Location
Seoul
Type
conf
DOI
10.1109/ICCD.2014.6974701
Filename
6974701
Link To Document