Real time reconfigurable image recognition system

In the paper the model-based development of a real-time, embedded Automated Image Recognition (AIR) system is described. AIR systems might have extremely large computational requirements, in the order of 10 GOP/s, in some modes of operation. To implement a system capable of processing high sampling rate and large input images, distributed processing must be used. The complexity of the applied distance-classifier correlation filter (DCCF) algorithm used demands the use of DSP processors; however, some computational bottlenecks cannot be overcome without using dedicated hardware support. 2D-FFT and 2D-IFFT operations were therefore implemented in FPGA circuits. From the specifications and test images provided, a heterogeneous, loosely coupled system was developed, which allows run-time algorithm mapping to resources (reconfiguration) from static configuration libraries, according to the changing stages of recognition