Title :
ESD protection device issues for IC designs
Author :
Duvvury, Charvaka
Author_Institution :
Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX, USA
Abstract :
Electrostatic discharge (ESD) has been a major concern for IC chip quality. In this paper, the IC damage phenomena due to ESD and the protection techniques are reviewed. Also, the severe impact of the advanced process technologies on the ESD robustness, and the special circuit requirements that make the protection design even more challenging will be addressed. The recently developed simulation and modeling methods to improve the protection designs are also discussed
Keywords :
electrostatic discharge; integrated circuit design; integrated circuit modelling; integrated circuit reliability; ESD protection device; IC designs; advanced process technologies; chip quality; damage phenomena; modeling methods; simulation; Biological system modeling; Clamps; Electrostatic discharge; Humans; Immune system; Integrated circuit modeling; Pins; Protection; Silicon; Stress;
Conference_Titel :
Custom Integrated Circuits, 2001, IEEE Conference on.
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-6591-7
DOI :
10.1109/CICC.2001.929720
