Reconfigurable semi-virtual computer architecture for long available small space vehicles

This paper presents a new hardware architecture for a hybrid space computer composed of both physical and virtual processors. The architecture emulates a multiple modular computer, including both physical and virtual spares, with a small amount of physical processors (flight computer) and virtual redundancies (payload processors). The flight computer contains a main processor, as well as a backup and a redundant processor. However, the instrumentation for the Satex mission also includes a redundant LAN with autonomous capabilities to detect its failures, to reconfigure by itself and to provide on-line maintenance by automated means. Communications between flight computer and payload microcomputers are accomplished over this LAN, allowing a versatile operating behavior in terms of data communication as well as in terms of distributed fault tolerance. Under this scenario a semi-virtual expanded flight architecture is periodically implemented in the microsatellite in order to emulate a bigger and safer computer with increased fault-tolerant features. Previous topology is conformed periodically aiming at failure detection, fault isolation, and hardware reconfiguration of processors to obtain high availability; moreover, the architecture can be applied in any small space vehicle. The paper also concerns with fault containment regions, Byzantine majority voting mechanisms, reconfiguration procedures, hardware protections, hardware and software diversity and flight computer interface with satellite instrumentation