Low power 0.25 μm ASIC technology for space applications

Author

Haddad, Nadim F. ; Berger, Richard W. ; Brown, Ronald D.

Author_Institution

BAE SYSTEMS, Manassas, VA, USA

Volume

5

fYear

2001

fDate

2001

Firstpage

2375

Abstract

The advent of broadband space communication has accelerated the need for high density, high performance, low power radiation hardened technology. A 0.25 μm CMOS radiation enhanced ASIC library was developed and demonstrated. The library is compatible with state-of-the-art radiation tolerant commercial foundry fabrication and offers a significant advancement over the latest radiation hardened technology now in production. The Library supports 70 ps delay, 0.02 μW/Gate/MHz power consumption and up to 7M gate/chip density, and achieves an upset rate of <1E-10 upset/bit/day in the 90% geosynchronous environment. The technology is latch-up immune and supports a total dose of >200 Krad (Si) in the natural space environment

Keywords

CMOS integrated circuits; application specific integrated circuits; integrated circuit technology; radiation hardening (electronics); space communication links; space vehicle electronics; >200 Krad; 0.02 μW/Gate/MHz power consumption; 0.25 μm ASIC; 0.25 mum; 200 krad; 70 ps; 70 ps delay; ASIC library; CMOS; Si; broadband space communication; latch-up immunity; radiation hardened technology; up to 7M gate/chip density; Acceleration; Application specific integrated circuits; Broadband communication; CMOS technology; Fabrication; Foundries; Libraries; Production; Radiation hardening; Space technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Aerospace Conference, 2001, IEEE Proceedings.

Conference_Location

Big Sky, MT

Print_ISBN

0-7803-6599-2

Type

conf

DOI

10.1109/AERO.2001.931196

Filename

931196