A novel method for stochastic nonlinearity analysis of a CMOS pipeline ADC

Author

Goren, David ; Shamsaev, Eliyahu ; Wagner, Israel A.

Author_Institution

IBM Haifa Res. Lab., Israel

fYear

2001

fDate

2001

Firstpage

127

Lastpage

132

Abstract

An analytic approach is presented for estimating the nonlinearity of an analog to digital converter (ADC) as a function of the variations in the circuit devices. The approach is demonstrated for the case of a pipeline ADC with digital error correction. Under some mild assumptions on the expected variations, the error probability is expressed as a simple explicit function of the standard deviations in the components´ parameters: gain errors, comparator offset errors and resistor errors. The analytical expression is verified for Integral Non Linearity (INL), and its limits are studied using Monte-Carlo simulations of a 10 bit pipeline ADC structure.

Keywords

CMOS integrated circuits; Monte Carlo methods; analogue-digital conversion; circuit simulation; comparators (circuits); error correction; error statistics; pipeline processing; 10 bit; CMOS pipeline ADC; Monte-Carlo simulations; comparator offset errors; digital error correction; error probability; explicit function; gain errors; integral nonlinearity; resistor errors; standard deviations; stochastic nonlinearity analysis; Analog-digital conversion; CMOS analog integrated circuits; CMOS digital integrated circuits; Error correction; Error probability; Linearity; Permission; Pipelines; Process design; Stochastic processes;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2001. Proceedings

ISSN

0738-100X

Print_ISBN

1-58113-297-2

Type

conf

DOI

10.1109/DAC.2001.156121

Filename

935490