DocumentCode :
1747889
Title :
Simultaneous shield insertion and net ordering under explicit RLC noise constraint
Author :
Lepak, Kevin M. ; Luwandi, Irwan ; He, Lei
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
fYear :
2001
fDate :
2001
Firstpage :
199
Lastpage :
202
Abstract :
For multiple coupled RLC nets, we formulate the min-area simultaneous shield insertion and net ordering (SINO/NB-v) problem to satisfy the given noise bound. We develop an efficient and conservative model to compute the peak noise, and apply the noise model to a simulated-annealing (SA) based algorithm for the SINO/NB-v problem. Extensive and accurate experiments show that the SA-based algorithm is efficient, and always achieves solutions satisfying the given noise bound. It uses up to 71% and 30% fewer shields when compared to a greedy based shield insertion algorithm and a separated shield insertion and net ordering algorithm, respectively. To the best of our knowledge, it is the first work that presents an in-depth study on the min-area SINO problem under an explicit noise constraint.
Keywords :
circuit layout CAD; inductance; integrated circuit interconnections; integrated circuit layout; integrated circuit noise; network routing; network topology; simulated annealing; explicit RLC noise constraint; min-area SINO problem; multiple coupled RLC nets; net ordering; noise bound; peak noise; shield insertion; simulated-annealing based algorithm; Computational modeling; Helium; Inductance; Mutual coupling; Permission; Routing; Switches; Topology; Voltage; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2001. Proceedings
ISSN :
0738-100X
Print_ISBN :
1-58113-297-2
Type :
conf
DOI :
10.1109/DAC.2001.156135
Filename :
935504
Link To Document :
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