DocumentCode :
1747898
Title :
Nuts and bolts of core and SoC verification
Author :
Albin, Ken
Author_Institution :
Motorola Inc., Austin, TX, USA
fYear :
2001
fDate :
2001
Firstpage :
249
Lastpage :
252
Abstract :
Digital design at Motorola is performed at design centers throughout the world, on projects with different design objectives, executed on different time scales, by different sized teams with different skill sets. This paper attempts to categorize these diverse efforts and identify common threads: what works, what the challenges are, and where we need to go.
Keywords :
formal verification; integrated circuit testing; logic testing; microprocessor chips; mixed analogue-digital integrated circuits; ASIC; Motorola; SoC verification; core verification; system-on-a-chip; Circuit simulation; Design engineering; Fasteners; Logic design; Permission; Process design; Protocols; Signal design; System-on-a-chip; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2001. Proceedings
ISSN :
0738-100X
Print_ISBN :
1-58113-297-2
Type :
conf
DOI :
10.1109/DAC.2001.156144
Filename :
935513
Link To Document :
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