DocumentCode :
1747899
Title :
Teaching future verification engineers: the forgotten side of logic design
Author :
Ozguner, Fusun ; Marhefka, Duane ; DeGroat, Joanne ; Wile, Bruce ; Stofer, Jennifer ; Hanrahan, Lyle
Author_Institution :
Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA
fYear :
2001
fDate :
2001
Firstpage :
253
Lastpage :
255
Abstract :
This paper describes a senior/graduate level course in hardware logic verification being offered by The Ohio State University in cooperation with IBM. The need for the course is established through the growing importance of logic verification to users of custom logic designs. We discuss the short-term and long-term goals for the course, and describe the course content and format. The course relies heavily on lab projects to illustrate the main concepts. Three projects and a final project review are described.
Keywords :
educational courses; electronic engineering education; formal verification; logic CAD; teaching; IBM; The Ohio State University; course content; course format; custom logic designs; graduate level course; hardware logic verification; lab projects; logic design; project review; teaching; verification engineers; Chip scale packaging; Design engineering; Education; Electrical engineering computing; Engineering profession; Hardware; Industrial training; Logic design; Permission; Time to market;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2001. Proceedings
ISSN :
0738-100X
Print_ISBN :
1-58113-297-2
Type :
conf
DOI :
10.1109/DAC.2001.156145
Filename :
935514
Link To Document :
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