A framework for object oriented hardware specification, verification, and synthesis

We describe two things. First, we present a uniform framework for object oriented specification and verification of hardware. For this purpose the object oriented language ´e´ is introduced along with a powerful run-time environment that enables the designer to perform the verification task. Second, we present an object oriented synthesis that enhances ´e´ and its dedicated run-time environment into a framework for specification, verification, and synthesis. The usability of our approach is demonstrated by real-world examples.