Title :
Dynamic management of scratch-pad memory space
Author :
Kandemir, M. ; Ramanujam, J. ; Irwin, M.J. ; Vijaykrishnan, N. ; Kadayif, I. ; Parikh, A.
Author_Institution :
Microsyst. Design Lab., Pennsylvania State Univ., University Park, PA, USA
Abstract :
Optimizations aimed at improving the efficiency of on-chip memories are extremely important. We propose a compiler-controlled dynamic on-chip scratch-pad memory (SPM) management framework that uses both loop and data transformations. Experimental results obtained using a generic cost model indicate significant reductions in data transfer activity between SPM and off-chip memory.
Keywords :
application specific integrated circuits; embedded systems; integrated circuit design; memory architecture; semiconductor storage; storage management; compiler-controlled dynamic on-chip management; data transfer activity; data transformations; generic cost model; loop transformations; on-chip memories; scratch-pad memory space; Costs; Design optimization; Dynamic compiler; Embedded system; Memory management; Permission; Process design; Random access memory; Scanning probe microscopy; System-on-a-chip;
Conference_Titel :
Design Automation Conference, 2001. Proceedings
Print_ISBN :
1-58113-297-2
DOI :
10.1109/DAC.2001.156226
