Title :
Current status of FET-type ferroelectric memories
Author :
Ishiwara, Hiroshi
Author_Institution :
Frontier Collaborative Res. Center, Tokyo Inst. of Technol., Yokohama, Japan
Abstract :
Current status of FET-type ferroelectric memories is reviewed. It is shown that an array of ferroelectric-gate FET´s formed on an SOI (silicon-on-insulator) structure is important in such applications as a single-transistor-cell-type digital memory and synaptic connection for an artificial neural network. Then, the problems in ferroelectric-gate FET´s are discussed. It is shown that insertion of a buffer layer between the ferroelectric film and Si substrate is essential in obtaining good electrical properties of the interface, but that the buffer layer degrades the memory retention characteristics severely. Solutions for the short retention time problem are discussed from the viewpoints of materials science and device structure
Keywords :
MOSFET; arrays; ferroelectric storage; neural chips; silicon-on-insulator; FET-type ferroelectric memories; MFMOS-FET; SOI structure; Si; Si substrate; Si-SiO2-Si; artificial neural network; buffer layer; ferroelectric film; ferroelectric random access memory; ferroelectric-gate FET array; interface electrical properties; memory retention characteristics; polarization characteristics; short retention time problem; single-transistor-cell-type digital memory; synaptic connection; Circuits; FETs; Ferroelectric films; Ferroelectric materials; Field programmable gate arrays; Insulation; Nonvolatile memory; Random access memory; Silicon on insulator technology; Substrates;
Conference_Titel :
Applications of Ferroelectrics, 2000. ISAF 2000. Proceedings of the 2000 12th IEEE International Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-7803-5940-2
DOI :
10.1109/ISAF.2000.941566
