DocumentCode :
175086
Title :
A 2-stage recursive receiver optimized for low flicker noise corner
Author :
Srinivasan, Rajagopalan ; Wei-Gi Ho ; Forbes, Travis ; Gharpurey, Ranjit
Author_Institution :
Univ. of Texas at Austin, Austin, TX, USA
fYear :
2014
fDate :
1-3 June 2014
Firstpage :
47
Lastpage :
50
Abstract :
Multi-frequency signal recursion allows for efficient reuse of transconductance in a radio receiver, which helps to reduce power dissipation. An I-Q receiver based on the recursive principle is demonstrated here. The design employs a self-biased load, with chopping at baseband in order to minimize low-frequency in-band flicker noise. The bias setting of the chopper devices is optimized to enhance the baseband load impedance and conversion gain of the receiver. An implementation in 130 nm CMOS provides 59.6 dB conversion gain for an RF of 960 MHz, and 8.2 dB DSB-NF. The measured flicker noise corner frequency is 100 kHz. The total current requirement is 2.6 mA from a 1.2 V supply.
Keywords :
CMOS integrated circuits; UHF integrated circuits; choppers (circuits); flicker noise; low-power electronics; radio receivers; 2-stage recursive receiver; I-Q receiver; baseband load impedance; chopper devices; conversion gain; current 2.6 mA; frequency 100 kHz; frequency 960 MHz; gain 59.6 dB; low flicker noise corner; low-frequency in-band flicker noise minimization; multifrequency signal recursion; noise figure 8.2 dB; power dissipation reduction; radio receiver; self-biased load; size 130 nm; transconductance reuse; voltage 1.2 V; Choppers (circuits); Mixers; Noise; Radio frequency; Receivers; Resistance; Switches; Direct downconversion receiver; flicker noise; low power; signal recursion; transconductance reuse;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2014 IEEE
Conference_Location :
Tampa, FL
ISSN :
1529-2517
Print_ISBN :
978-1-4799-3862-9
Type :
conf
DOI :
10.1109/RFIC.2014.6851654
Filename :
6851654
Link To Document :
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