Title :
Spatially power-combined W-band power amplifier using stacked CMOS
Author :
Jayamon, J. ; Gurbuz, Ozan ; Hanafi, B. ; Agah, A. ; Buckwalter, J. ; Rebeiz, Gabriel ; Asbeck, P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of California San Diego, La Jolla, CA, USA
Abstract :
A spatially power-combined CMOS SOI power amplifier at 94 GHz is reported. The CMOS chip contains a 2×4 array of pseudo-differential power amplifiers, and is integrated with a microstrip antenna array on a quartz superstrate. A 13-stage amplifier chain is implemented to provide gain, using stacked NFETs in a 45-nm CMOS SOI process. The amplifier array outputs a power of 24 dBm (250 mW) and the chip-quartz assembly radiates an equivalent isotropic radiated power (EIRP) of 33 dBm at 94 GHz. This is the highest radiated power reported from a Silicon CMOS active array transmitter at W-band, and the highest W-band output power from a single CMOS chip.
Keywords :
CMOS analogue integrated circuits; differential amplifiers; field effect MIMIC; field effect transistor circuits; microstrip antenna arrays; millimetre wave power amplifiers; power combiners; silicon-on-insulator; EIRP; amplifier array; chip-quartz assembly; equivalent isotropic radiated power; frequency 94 GHz; microstrip antenna array; power 250 mW; pseudodifferential power amplifiers; quartz superstrate; silicon CMOS active array transmitter; single CMOS chip; size 45 nm; spatially power-combined CMOS SOI power amplifier; spatially power-combined W-band power amplifier; stacked NFETs; Arrays; CMOS integrated circuits; Gain; Microstrip antennas; Power amplifiers; Power generation; CMOS SOI; W-band; antenna array; equivalent isotropic radiated power (EIRP); millimeter-wave; power amplifier; power-combining; stacked FET;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2014 IEEE
Conference_Location :
Tampa, FL
Print_ISBN :
978-1-4799-3862-9
DOI :
10.1109/RFIC.2014.6851683
