A 23dBm fully digital transmitter using ΣΔ and pulse-width modulation for LTE and WLAN applications in 45nm CMOS

This paper presents a 23 dBm fully digital transmitter designed in a standard 45 nm CMOS process. The digital transmitter replaces the entire analog/RF signal chain in a traditional transmitter architecture. It utilizes ΣΔ modulation and pulse-width modulation to turn high resolution baseband I and Q signals into switching signals, thereby allowing efficient Class-D PA stages to be used. In addition, cascaded ΣΔ stages and switched-capacitor combining are incorporated into the architecture to reduced out-of-band quantization noise while maintaining good efficiency. The proposed transmitter achieves peak output power of 23 dBm with 47% power added efficiency (PAE). For a OFDM signal with 8.2 dB peak-to-average power ratio (PAR), the PAE is 23%. The linearity of the digital transmitter meets WiFi spectral mask without any digital predistortion.