DocumentCode
1753210
Title
Using Super Cut-off Carbon Nanotube Sleep Transistors in Silicon Based Low Power Digital Circuits
Author
Raychowdhury, Arijit ; Roy, Kaushik
Author_Institution
Department of Electrical and Computer Engineering, Purdue University, IN, USA, araycho@ecn.purdue.edu
Volume
1
fYear
2006
fDate
17-20 June 2006
Firstpage
322
Lastpage
325
Abstract
In this paper, we have explored the use of super cut-off tunneling carbon nanotube FETs for ultralow power digital logic. The use of such FETs in conjunction with the existing Si technology yields more than 1000X (10X) savings in leakage power in random logic (SRAM)
Keywords
Carbon nanotubes; Digital circuits; FETs; Logic circuits; Logic design; Logic devices; MOSFETs; Silicon; Sleep; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology, 2006. IEEE-NANO 2006. Sixth IEEE Conference on
Print_ISBN
1-4244-0077-5
Type
conf
DOI
10.1109/NANO.2006.247640
Filename
1717090
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