DocumentCode :
1753378
Title :
Scalable GA processor architecture and its implementation of processor-element
Author :
Imai, Tetsuya ; Yoshikawa, Masaya ; Terai, Hidekazu ; Yamauchi, Hironori
Author_Institution :
Graduate School of Science and Engineering, Ritsumeikan University, Noji-Higashi 1-1-1, Kusatsu, Shiga, 525-8577, Japan
Volume :
3
fYear :
2002
fDate :
13-17 May 2002
Abstract :
Genetic Algorithm (GA) is widely known as a general-purpose optimization method, which can provide sub-optimum solutions for various. optimization problems by means of modeling genetic evolutionary process of creatures. Several essential difficulties exist in GA, however, with regard to large amount of computation time, premature convergence in early stage of evolution and proper adjustment of many GA parameters. In order to overcome the difficulties of GA, this paper describes the architecture of a scalable and high-speed GA processor, which is characterized by hardware-oriented approach based on Distributed GA, optimized hierarchic pipelines for high-speed evolutions and flexible genetic operations corresponding to a given problem. Furthermore, this paper also describes VLSI implementation of a processor-element to verify feasibility of our proposed architecture for applications.
Keywords :
Complexity theory; Computer architecture; Gallium; Hardware; Process control; Software; Variable speed drives;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing (ICASSP), 2002 IEEE International Conference on
Conference_Location :
Orlando, FL, USA
ISSN :
1520-6149
Print_ISBN :
0-7803-7402-9
Type :
conf
DOI :
10.1109/ICASSP.2002.5745317
Filename :
5745317
Link To Document :
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