DocumentCode
1753392
Title
VLSI architecture for a new real-time 3D wavelet transform
Author
Das, Biswajit ; Banerjee, Swapna
Author_Institution
Department of Electronics and ECE, Indian Institute of Technology, Kharagpur - 721302, INDIA
Volume
3
fYear
2002
fDate
13-17 May 2002
Abstract
In this paper a real-time 3-D discrete wavelet transform algorithm is proposed. The inter-frame decomposition is achieved using the last two frames of the sequence. Reduced buffer and real-time applicability makes the algorithm usable for high-speed bi-directional interactive applications of multimedia and also HOTY. An efficient VLSI architecture which promises 100% hardware utilization low buffering and low hardware complexity is designed for the realization of the 3-D wavelet transform. DWT filters, designed by data-folding architecture and QMF lattice filters are arranged in pipeline to achieve the spatial decomposition with high through-put. A parallel array architecture is used for the decomposition in temporal direction which proves efficient to accomodate the huge amount of data.
Keywords
Adders; Discrete wavelet transforms; Encoding;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing (ICASSP), 2002 IEEE International Conference on
Conference_Location
Orlando, FL, USA
ISSN
1520-6149
Print_ISBN
0-7803-7402-9
Type
conf
DOI
10.1109/ICASSP.2002.5745336
Filename
5745336
Link To Document