Title :
A real-time 3D image refinement using two-line buffers
Author :
Kim, Jong-hak ; Cho, Jun-dong
Author_Institution :
Dept. of Electr. & Comput. Eng., Sungkyunkwan Univ., Suwon, South Korea
Abstract :
Recently 3D image processing has been one of vibrant research field. This processing requires very high speed and performance for real-time processing. In this paper, we propose a special memory management unit with n2 two-line buffers (distributed ram), by adjusting read and write speed to match core´s speed for efficient pipelining. We synthesize on Vertex 5 from Xilinx, operating 100 MHz clock. Our core unit is a real time refinement core on erosion and dilation, using a 3 by 3 and a 5 by 5 window, respectively, in a 160 by 90 image. Our proposed method is 30 times faster processing time and slightly lower memory consumption than previous one.
Keywords :
image processing; real-time systems; storage management; 3D image processing; Vertex 5; Xilinx; pipelining; real-time 3D image refinement; two-line buffers; vibrant research field; Buffer storage; Clocks; Image processing; Loading; Memory management; Pixel; Real time systems; 3D; memory management; real-time image processing; refinement; two-line-buffer;
Conference_Titel :
Advanced Communication Technology (ICACT), 2011 13th International Conference on
Conference_Location :
Seoul
Print_ISBN :
978-1-4244-8830-8