Title : 
Input plan optimization system for the high mix low volume factory of the semiconductor manufacturing
         
        
            Author : 
Kamoda, Koji ; Miwa, Toshiharu ; Fujiwara, Shoichiro ; Chida, Takafumi ; Nishihara, Nobuaki
         
        
            Author_Institution : 
Production Eng. Res. Lab., Hitachi, Ltd., Yokohama, Japan
         
        
        
        
        
        
            Abstract : 
For the purpose of semiconductor manufacturing TAT (Turn Around Time) reduction, throughput variability reduction for each machine has been requested. For this purpose, this research presents a new dispatching method by calculating number of input volume for each product automatically with a normalized index that quantifies production capability for each machine to manufacturing plan. As a result, the proposed method reduced arrival variability of the bottleneck machine by 33 to 51% to reduce TAT by 13 to 37%.
         
        
            Keywords : 
optimisation; semiconductor industry; dispatching method; high mix low volume factory; input plan optimization system; manufacturing plan; normalized index; production capability; semiconductor manufacturing; throughput variability reduction; turn around time reduction; Films; Implants; Indexes;
         
        
        
        
            Conference_Titel : 
Semiconductor Manufacturing (ISSM), 2010 International Symposium on
         
        
            Conference_Location : 
Tokyo
         
        
        
            Print_ISBN : 
978-1-4577-0392-8
         
        
            Electronic_ISBN : 
1523-553X