Yield model for estimation of yield impact of semiconductor manufacturing equipment

Author

Nutsch, A. ; Oechsner, R. ; Schoepka, U. ; Pfitzner, L.

Author_Institution

Fraunhofer Inst. Integrated Syst. & Device Technol., Erlangen, Germany

fYear

2010

fDate

18-20 Oct. 2010

Firstpage

1

Lastpage

4

Abstract

A yield model was developed allowing the calculation of yield using defect density data of manufacturing equipment. The approach allows studying impact of semiconductor manufacturing equipment on yield, to calculate and monitor yield during semiconductor manufacturing and predicting yield based on real time input of semiconductor manufacturing equipment regarding failures, defect density etc. The yield model bases on generic flows of manufacturing processes. The model assigns each functional layer a yield loss during the sequence of manufacturing steps. The yield model was implemented in a software code. The software was used to study yield impact of specific equipment for different technologies and products.

Keywords

integrated circuit yield; production equipment; semiconductor industry; defect density data; manufacturing process; semiconductor manufacturing equipment; software code; yield impact estimation; yield loss; yield model; yield monitoring; Integrated circuit modeling; Logic gates; Manufacturing; Metals; Noise; Oxidation; Semiconductor device modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Manufacturing (ISSM), 2010 International Symposium on

Conference_Location

Tokyo

ISSN

1523-553X

Print_ISBN

978-1-4577-0392-8

Electronic_ISBN

1523-553X

Type

conf

Filename

5750257