Thermal isolation in 3D chip stacks using vacuum gaps and capacitive or inductive communications

In a 3D chip stack, it is important to thermally isolate any DRAMs from high power processors, so that the former can operate at low junction temperatures. One way to do this is to use the combination of a vacuum gap, formed using standard semiconductor processing, together with capacitive or inductive signaling across the gap. Simulation shows that the DRAM can operate at a temperature 47°C cooler than the CPU.