DocumentCode :
1754191
Title :
Recent developments of Cu-Cu non-thermo compression bonding for wafer-to-wafer 3D stacking
Author :
Radu, I. ; Landru, D. ; Gaudin, G. ; Riou, G. ; Tempesta, C. ; Letertre, F. ; Cioccio, L. Di ; Gueguen, P. ; Signamarcheix, T. ; Euvrard, C. ; Dechamp, J. ; Clavelier, L. ; Sadaka, M.
Author_Institution :
SOITEC, Crolles, France
fYear :
2010
fDate :
16-18 Nov. 2010
Firstpage :
1
Lastpage :
6
Abstract :
This paper will focus on recent results of Cu-Cu non-thermo compression bonding for wafer-to-wafer 3D stacking. We report on bonding quality, wafer-to-wafer alignment accuracy and electrical connectivity. Specific pre-bonding surface conditioning is necessary to insure high bonding quality of patterned Cu wafers. A particular concern is related to the planarization (e.g. CMP) of Cu-SiO2 hybrid surfaces: copper dishing and erosion need to be minimized in order to obtain high bonding quality. The bonding quality is assessed by the evaluation of bonding strength, interfacial defects, wafer-to-wafer misalignment and electrical contact resistance at the Cu-Cu interface. The bonding strength evolution with post-bond annealing is reported and discussed for the case of patterned surfaces. Scanning Acoustic Microscopy (SAM) imaging of bonding interface is performed to monitor bonded defects. Process conditions have been optimized to minimize the post bond annealing (thermal budget) at temperatures below 400°C.
Keywords :
acoustic microscopy; annealing; contact resistance; copper; thermal management (packaging); wafer bonding; wafer level packaging; Cu-Cu nonthermo compression bonding; CuSiO2; SAM imaging; bonded defect; bonding interface; bonding quality; bonding strength; copper dishing; electrical connectivity; electrical contact resistance; erosion; interfacial defect; patterned Cu wafer; planarization; post-bond annealing; prebonding surface conditioning; scanning acoustic microscopy; wafer-to-wafer 3D stacking; wafer-to-wafer alignment accuracy; Annealing; Bonding; Copper; Electrical resistance measurement; Silicon; Surface topography; Surface treatment; 3D integration; Cu-Cu direct bonding; bonding strength; electrical resistivity; wafer stacking; wafer-to-wafer alignment;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
3D Systems Integration Conference (3DIC), 2010 IEEE International
Conference_Location :
Munich
Print_ISBN :
978-1-4577-0526-7
Type :
conf
DOI :
10.1109/3DIC.2010.5751454
Filename :
5751454
Link To Document :
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