DocumentCode
1754208
Title
A novel concept for ultra-low capacitance via-last TSV
Author
Civale, Y. ; Gonzalez, M. ; Tezcan, D.S. ; Travaly, Y. ; Soussan, P. ; Beyne, E.
Author_Institution
Imec, Leuven, Belgium
fYear
2010
fDate
16-18 Nov. 2010
Firstpage
1
Lastpage
4
Abstract
In this study, we report a new concept of through silicon via for 3D applications requiring ultra-low coupling capacitance. The challenges linked to the integration of such structure, as well as preliminary results on stress level and distribution in the TSV are addressed in details below.
Keywords
joining processes; three-dimensional integrated circuits; TSV technology; through silicon via technology; ultra-low coupling capacitance; Capacitance; Copper; Dielectrics; Silicon; Stress; Three dimensional displays; Through-silicon vias; 3D interconnect; Low coupling capacitance; Through-Silicon Via; via-last;
fLanguage
English
Publisher
ieee
Conference_Titel
3D Systems Integration Conference (3DIC), 2010 IEEE International
Conference_Location
Munich
Print_ISBN
978-1-4577-0526-7
Type
conf
DOI
10.1109/3DIC.2010.5751482
Filename
5751482
Link To Document