DocumentCode
1754571
Title
A Floating Analog Memristor Emulator Circuit
Author
Sanchez-Lopez, C. ; Mendoza-Lopez, J. ; Carrasco-Aguilar, M.A. ; Muniz-Montero, C.
Author_Institution
Univ. Autonoma de Tlaxcala (UAT), Tlaxcala, Mexico
Volume
61
Issue
5
fYear
2014
fDate
41760
Firstpage
309
Lastpage
313
Abstract
This brief introduces a new floating memristor emulator circuit based on second-generation current conveyors and passive elements. A mathematical model to characterize the memristor behavior was derived, showing a good accuracy among HSPICE simulations and experimental results. An analysis of the frequency behavior of the memristor is also described, showing that the frequency-dependent pinched hysteresis loop in the current-versus-voltage plane holds up to 20.2 kHz. Theoretical derivations and related results are experimentally validated through implementations from commercially available devices, and the proposed memristor emulator circuit can easily be reproducible at a low cost. Furthermore, the emulator circuit can be used as a teaching aid and for future applications with memristors, such as sensors, cellular neural networks, chaotic systems, programmable analog circuits, and nonvolatile memory devices.
Keywords
current conveyors; memristors; passive networks; HSPICE simulation; cellular neural network; chaotic system; current-versus-voltage plane; floating analog memristor emulator circuit; frequency-dependent pinched hysteresis loop; mathematical model; nonvolatile memory device; passive elements; programmable analog circuit; second-generation current conveyor; sensor; Chaos; Computational modeling; Frequency locked loops; Hysteresis; Integrated circuit modeling; Memristors; Current conveyors (CCs); memristor; nonlinear resistor; pinched hysteresis loop;
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2014.2312806
Filename
6803893
Link To Document