Performance Benchmarking and Effective Channel Length for Nanoscale InAs, , and sSi n-MOSFETs

Thanks to the high electron velocities, III-V semiconductors have the potential to meet the challenging ITRS requirements for high performance for sub-22-nm technology nodes and at a supply voltage approaching 0.5 V. This paper presents a comparative simulation study of ultrathin-body InAs, In_0.53Ga_0.47As, and strained Si MOSFETs, by using a comprehensive semiclassical multisubband Monte Carlo (MSMC) transport model. Our results show that: 1) due to the finite screening length in the source-drain regions, III-V and Si nanoscale MOSFETs with a given gate length (L_G) may have a quite different effective channel length (L_eff); 2) the difference in L_eff provides a useful insight to interpret the performance comparison of III-V and Si MOSFETs; and 3) the engineering of the source-drain regions has a remarkable influence on the overall performance of nanoscale III-V MOSFETs.