Title :
Design of fast low-power floating high-voltage level-shifters
Author_Institution :
Sch. of Electr. Eng. & Telecommun., Univ. of New South Wales, Sydney, NSW, Australia
Abstract :
What limits performance in some recently published digital floating level-shifters are identified and a new level-shifter is proposed to address these limitations. An order-of-magnitude reduction in power dissipation compared with the recently published fast high-voltage level-shifters is obtained; simulations in a high-voltage 0.35 μm process show the proposed design is capable of shifting a 2.5 V logic signal up by 17.5 V with a propagation delay of 3 ns and a transition energy of 6 pJ.
Keywords :
logic circuits; low-power electronics; energy 6 pJ; fast low-power digital floating high-voltage level-shifter; order-of-magnitude reduction; power dissipation; size 0.35 mum; time 3 ns; voltage 17.5 V; voltage 2.5 V;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2013.2270