DocumentCode
1756564
Title
Spike-Based Synaptic Plasticity in Silicon: Design, Implementation, Application, and Challenges
Author
Azghadi, Mostafa Rahimi ; Iannella, Nicolangelo ; Al-Sarawi, Said F. ; Indiveri, Giacomo ; Abbott, Derek
Author_Institution
Sch. of Electr. & Electron. Eng., Univ. of Adelaide, Adelaide, SA, Australia
Volume
102
Issue
5
fYear
2014
fDate
41760
Firstpage
717
Lastpage
737
Abstract
The ability to carry out signal processing, classification, recognition, and computation in artificial spiking neural networks (SNNs) is mediated by their synapses. In particular, through activity-dependent alteration of their efficacies, synapses play a fundamental role in learning. The mathematical prescriptions under which synapses modify their weights are termed synaptic plasticity rules. These learning rules can be based on abstract computational neuroscience models or on detailed biophysical ones. As these rules are being proposed and developed by experimental and computational neuroscientists, engineers strive to design and implement them in silicon and en masse in order to employ them in complex real-world applications. In this paper, we describe analog very large-scale integration (VLSI) circuit implementations of multiple synaptic plasticity rules, ranging from phenomenological ones (e.g., based on spike timing, mean firing rates, or both) to biophysically realistic ones (e.g., calcium-dependent models). We discuss the application domains, weaknesses, and strengths of various representative approaches proposed in the literature, and provide insight into the challenges that engineers face when designing and implementing synaptic plasticity rules in VLSI technology for utilizing them in real-world applications.
Keywords
VLSI; analogue integrated circuits; learning (artificial intelligence); neural chips; VLSI; abstract computational neuroscience models; analog very large scale integration circuit; artificial spiking neural networks; learning rules; mathematical prescriptions; neural chips; spike based synaptic plasticity; Learning systems; Logic gates; Neuromorphics; Neurons; Neuroscience; Plastics; Silicon; Transistors; Analog/digital synapse; Bienenstock–Cooper–Munro (BCM); Bienenstock??Cooper??Munro (BCM); calcium-based plasticity; learning; local correlation plasticity (LCP); neuromorphic engineering; rate-based plasticity; spike-based plasticity; spike-timing-dependent plasticity (STDP); spiking neural networks; synaptic plasticity; triplet STDP; very large-scale integration (VLSI); voltage-based STDP;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/JPROC.2014.2314454
Filename
6804688
Link To Document