• DocumentCode
    1756949
  • Title

    New Planar Junction Edge Termination Technique Using OPTVLD With a Buried Layer

  • Author

    Junji Cheng ; Xingbi Chen

  • Author_Institution
    State Key Lab. of Electron. Thin Films & Integrated Devices of China, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
  • Volume
    60
  • Issue
    7
  • fYear
    2013
  • fDate
    41456
  • Firstpage
    2428
  • Lastpage
    2431
  • Abstract
    A new planar junction edge termination technique, using the optimum variation lateral doping with a buried layer, is proposed and studied. A voltage equal to 100% of the breakdown voltage of a single-sided abrupt parallel-plane junction with the same substrate can be achieved within a smallest area on the surface. The proposed technique can be realized by a process compatible with conventional CMOS or BiCMOS technologies and verified by the results of numerical simulations.
  • Keywords
    BiCMOS integrated circuits; buried layers; numerical analysis; semiconductor doping; BiCMOS technologies; CMOS technologies; OPTVLD; buried layer; numerical simulations; optimum variation lateral doping; parallel-plane junction; planar junction edge termination; BiCMOS; CMOS; electric field profile; optimum variation lateral doping (OPTVLD); planar junction edge termination technique; power devices;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2013.2264342
  • Filename
    6525360