• DocumentCode
    1757082
  • Title

    Concatenated Raptor Codes in NAND Flash Memory

  • Author

    Geunyeong Yu ; Jaekyun Moon

  • Author_Institution
    Dept. of of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
  • Volume
    32
  • Issue
    5
  • fYear
    2014
  • fDate
    41760
  • Firstpage
    857
  • Lastpage
    869
  • Abstract
    Two concatenated coding schemes based on fixed-rate Raptor codes are proposed for error control in NAND flash memory. One is geared for off-line recovery of uncorrectable pages and the other is designed for page error correction during the normal read mode. Both proposed coding strategies assume hard-decision decoding of the inner code with inner decoding failure generating erasure symbols for the outer Raptor code. Raptor codes allow low-complexity decoding of very long codewords while providing capacity-approaching performance for erasure channels. For the off-line page recovery scheme, one whole NAND block forms a Raptor codeword with each inner codeword typically made up of several Raptor symbols. An efficient look-up-table strategy is devised for Raptor encoding and decoding which avoids using large buffers in the controller despite the substantial size of the Raptor code employed. The potential performance benefit of the proposed scheme is evaluated in terms of the probability of block recovery conditioned on the presence of uncorrectable pages. In the suggested page-error-correction strategy, on the other hand, a hard-decision-iterating product code is used as the inner code. The specific product code employed in this work is based on row-column concatenation with multiple intersecting bits to allow the use of longer component codes. In this setting the collection of bits captured within each intersection of the row-column codes acts as the Raptor symbol(s), and the intersections of failed row codes and column codes are declared as erasures. The error rate analysis indicates that the proposed concatenation provides a considerable performance boost relative to the existing error correcting system based on long Bose-Chauduri-Hocquenghem (BCH) codes.
  • Keywords
    BCH codes; NAND circuits; concatenated codes; decoding; error correction codes; flash memories; probability; table lookup; BCH codes; Bose-Chauduri-Hocquenghem codes; NAND block; NAND flash memory; block recovery probability; capacity-approaching performance; column codes; concatenated Raptor codes; erasure channels; erasure symbols; error control; error correcting system; error rate analysis; fixed-rate Raptor codes; hard-decision decoding; hard-decision-iterating product code; look-up-table strategy; low-complexity decoding; off-line page recovery scheme; page-error-correction strategy; row-column concatenation; Ash; Encoding; Error correction codes; Maximum likelihood decoding; Table lookup; Vectors; BCH codes; Raptor codes; error-correction-code; flash memory; product codes;
  • fLanguage
    English
  • Journal_Title
    Selected Areas in Communications, IEEE Journal on
  • Publisher
    ieee
  • ISSN
    0733-8716
  • Type

    jour

  • DOI
    10.1109/JSAC.2014.140506
  • Filename
    6804931