• DocumentCode
    1757263
  • Title

    Virtual Channels and Multiple Physical Networks: Two Alternatives to Improve NoC Performance

  • Author

    Young Jin Yoon ; Concer, Nicola ; Petracca, M. ; Carloni, Luca P.

  • Author_Institution
    Dept. of Comput. Sci., Columbia Univ., New York, NY, USA
  • Volume
    32
  • Issue
    12
  • fYear
    2013
  • fDate
    Dec. 2013
  • Firstpage
    1906
  • Lastpage
    1919
  • Abstract
    Virtual channels (VC) and multiple physical (MP) networks are two alternative methods to provide better performance, support quality-of-service, and avoid protocol deadlocks in packet-switched network-on-chip design. Since contention can be dynamically resolved, VCs give lower zero-load packet latency than MPs; however, MPs can be built with simpler routers and narrower channels, which improves the target clock frequency, power dissipation, and area occupation. In this paper, we present a comprehensive comparative analysis of these two design approaches, including an analytical model, synthesis-based designs with both FPGAs and standard-cell libraries, and system-level simulations. The result of our analysis shows that one solution does not outperform the other in all the tested scenarios. Instead, each approach has its own specific strengths and weaknesses. Hence, we identify the scenarios where each method is best suited to achieve high performance, very low power dissipation, and increased design flexibility.
  • Keywords
    field programmable gate arrays; low-power electronics; network-on-chip; packet switching; quality of service; FPGA; NoC performance; design flexibility; low power dissipation; multiple physical networks; packet switched network-on-chip design; protocol deadlocks; quality of service; standard cell libraries; system-level simulations; virtual channels; zero-load packet latency; Design synthesis; Network-on-chip; Packet switching; Power dissipation; Quality of service; multiplane; multiple physical networks; network-on-chip (NoC); virtual channel;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2013.2276399
  • Filename
    6663237