• DocumentCode
    1757922
  • Title

    InGaAs Gate-All-Around Nanowire Devices on 300mm Si Substrates

  • Author

    Waldron, Niamh ; Merckling, C. ; Teugels, Lieve ; Ong, Patrick ; Ibrahim, Sheikh Ansar Usman ; Sebaai, Farid ; Pourghaderi, Ali ; Barla, Kathy ; Collaert, Nadine ; Thean, Aaron Voon-Yew

  • Author_Institution
    imec, Leuven, Belgium
  • Volume
    35
  • Issue
    11
  • fYear
    2014
  • fDate
    Nov. 2014
  • Firstpage
    1097
  • Lastpage
    1099
  • Abstract
    In this letter, we present the first InGaAs gate-all-around (GAA) nanowire devices fabricated on 300mm Si substrates. For an LG of 60 nm an extrinsic gm of 1030 μS/μm at Vds = 0.5 V is achieved which is a 1.75× increase compared with the replacement fin FinFet process. This improvement is attributed to the elimination of Mg counterdoping in the GAA flow. Ultrascaled nanowires with diameters of 6 nm were demonstrated to show immunity to Dit resulting in an SSSAT of 66 mV/decade and negligible drain-induced barrier lowering for 85-nm LG devices.
  • Keywords
    III-V semiconductors; gallium arsenide; indium compounds; nanowires; substrates; GAA flow; InGaAs; InGaAs GAA nanowire devices; InGaAs gate-all-around nanowire devices; Mg counterdoping; Si substrates; drain-induced barrier lowering; replacement fin FinFet process; size 300 mm; size 60 nm; size 85 nm; ultrascaled nanowires; voltage 0.5 V; FinFETs; Indium gallium arsenide; Indium phosphide; Logic gates; Nanoscale devices; Performance evaluation; Silicon; FinFet; III-V; InGaAs; gate-all-around; nanowire;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2014.2359579
  • Filename
    6914587