DocumentCode
1758283
Title
Architecture of a Fully Pipelined Real-Time Cellular Neural Network Emulator
Author
Yildiz, Nerhun ; Cesur, Evren ; Kayaer, Kamer ; Tavsanoglu, Vedat ; Alpay, Murathan
Author_Institution
Dept. of Electron. & Commun. Eng., Yildiz Tech. Univ., Istanbul, Turkey
Volume
62
Issue
1
fYear
2015
fDate
Jan. 2015
Firstpage
130
Lastpage
138
Abstract
In this paper, architecture of a Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v2) is given and the implementation results are discussed. The proposed architecture has a fully pipelined structure, capable of processing full-HD 1080p@60 (1920 × 1080 resolution at 60 Hz frame rate, 124.4 MHz visible pixel rate) video streams, which is implemented on both high-end and low-cost FPGA devices, Altera Stratix IV GX 230, and Cyclone III C 25, respectively. Many features of the architecture are designed to be either pre-synthesis configurable or runtime programmable, which makes the processor extremely flexible, reusable, scalable, and practical.
Keywords
field programmable gate arrays; neural nets; pipeline processing; video equipment; video streaming; Altera Stratix IV GX 230; Cyclone III C 25; FPGA; fully pipelined real-time cellular neural network emulator; real-time cellular neural network processor; visible pixel rate video stream; Clocks; Computer architecture; Field programmable gate arrays; Mathematical model; Process control; Random access memory; Streaming media; Cellular neural networks; field programmable gate arrays; real time systems; reconfigurable architectures;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2014.2345502
Filename
6914622
Link To Document