DocumentCode :
1758943
Title :
A Throughput-Optimized Optical Network for Data-Intensive Computing
Author :
Schares, L. ; Lee, Byeong ; Checconi, Fabio ; Budd, Russell ; Rylyakov, A. ; Dupuis, N. ; Petrini, Fabrizio ; Schow, C.L. ; Fuentes, Pablo ; Mattes, Oliver ; Minkenberg, Cyriel
Volume :
34
Issue :
5
fYear :
2014
fDate :
Sept.-Oct. 2014
Firstpage :
52
Lastpage :
63
Abstract :
Data-intensive computing increasingly involves operations at the scale of an entire computing system, requiring quick and efficient processing of massive datasets. In this article, the authors present a circuit-switched network architecture, together with requisite optical-switch and burst-mode transceiver technology, designed to support demanding graph algorithms in a distributed-memory system. The proposed optical network, configured as multiple planes of high-radix wavelength-division-multiplexed (WDM) switches, offers tremendous path diversity and is designed to deliver up to 10 terabytes per second of node bandwidth and predictable performance under heavy load with latencies well under a microsecond. With the optical core switch, the authors overcome pin-count and power-dissipation limitations of electrical networks with comparable bandwidth. To achieve this, they are developing new hardware, including nanosecond-scale silicon photonic switches with flip-chip-attached optical amplifiers, low-power parallel WDM transceivers operating at about 20-Gbps per channel, with burst-mode clock and data recovery circuits in advanced CMOS for link retraining in tens of nanoseconds. Network simulations predict that the proposed system could achieve graph performance on par with today´s leading supercomputers, and its limited power consumption would result in several orders of magnitude of efficiency improvements that could allow the system to fit within a few racks.
Keywords :
CMOS integrated circuits; circuit switching; clock and data recovery circuits; elemental semiconductors; flip-chip devices; optical switches; optical transceivers; silicon; wavelength division multiplexing; Si; WDM switches; advanced CMOS; burst mode clock and data recovery circuits; burst-mode transceiver technology; circuit-switched network architecture; data-intensive computing; demanding graph algorithms; distributed memory system; electrical networks; flip-chip-attached optical amplifiers; high-radix wavelength division multiplexed switches; limited power consumption; low-power parallel WDM transceivers; nanosecond-scale silicon photonic switches; optical core switch; path diversity; requisite optical-switch; supercomputers; throughput-optimized optical network; Bandwidth; Computer architecture; Data centers; High-speed optical techniques; Optical fiber networks; Optical switches; distributed computing; graph exploration algorithm; high performance computing; networking; optical network; optical switching;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2014.77
Filename :
6915625
Link To Document :
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