DocumentCode :
1759864
Title :
Comparing techniques for spur reduction in digital bang-bang PLLs
Author :
Maffezzoni, Paolo ; Marucci, Giovanni ; Levantino, Salvatore ; Samori, Carlo
Author_Institution :
Dipt. di Elettron. Inf. e Bioingegneria, Politec. di Milano, Milan, Italy
Volume :
49
Issue :
8
fYear :
2013
fDate :
April 11 2013
Firstpage :
527
Lastpage :
529
Abstract :
Bang-bang phase-locked loops (PLLs) are prone to generate unwanted output spur tones and high noise floor. In this reported work, a spur reduction technique based on dithering is compared to an alternative technique which exploits oscillator intrinsic noise. It is shown how the latter, joined to a proper loop design, allows eliminating unwanted spur tones while yielding a lower noise floor.
Keywords :
digital phase locked loops; oscillators; digital bang-bang PLL; digital bang-bang phase-locked looper; dithering; high noise floor; loop design; oscillator intrinsic noise; spur reduction technique; unwanted output spur tones;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2012.4402
Filename :
6527540
Link To Document :
بازگشت