DocumentCode
1760874
Title
SlackProbe: A Flexible and Efficient In Situ Timing Slack Monitoring Methodology
Author
Liangzhen Lai ; Chandra, Vishal ; Aitken, R.C. ; Gupta, Puneet
Author_Institution
Electr. Eng. Dept., Univ. of California, Los Angeles, Los Angeles, CA, USA
Volume
33
Issue
8
fYear
2014
fDate
Aug. 2014
Firstpage
1168
Lastpage
1179
Abstract
In situ monitoring is an accurate way to monitor circuit delay or timing slack, but usually incurs significant overhead. We observe that most existing slack monitoring methods focus exclusively on monitoring path endpoints, which is not cost efficient from power and area perspectives. In this paper, we first propose SlackProbe methodology, which inserts timing slack monitors like probes at a selected set of nets, including intermediate nets along critical paths. SlackProbe can be used to detect impending delay failures due to various reasons (process variations, ambient fluctuations, circuit aging, etc.) and can be used with various preventive actions (e.g., voltage/frequency scaling, clock stretching/time borrowing, etc.). Then we perform thorough analysis of the potential benefits and caveats of SlackProbe over conventional approaches in terms of number of monitors required, monitoring efficiency and observability, delay margin, and design perturbation. Experimental results on commercial processors show that with 5% extra timing margin, SlackProbe can reduce the number of monitors by 12-16X as compared to the number of monitors inserted at path ending pins. SlackProbe can also improve the monitoring efficiency by up to 1.9X and improve the monitoring observability by up to 32%, as compared to endpoint monitoring.
Keywords
delays; integrated circuit design; integrated circuit reliability; microprocessor chips; timing; SlackProbe methods; circuit delay monitoring; commercial processor; critical path; delay margin; design perturbation; impending delay failure; in-situ timing slack monitoring methodology; monitoring efficiency; timing slack monitioring; Clocks; Delays; Monitoring; Registers; Temperature measurement; Temperature sensors; Average case design; delay testing; low-power design; network flow algorithm; timing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2014.2323195
Filename
6856304
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