Title :
ASIC and FPGA Implementation of the Gaussian Mixture Model Algorithm for Real-Time Segmentation of High Definition Video
Author :
Genovese, Marco ; Napoli, E.
Author_Institution :
Dept. of Biomed., Electron. & Telecommun. Eng., Univ. of Napoli Federico II, Naples, Italy
Abstract :
Background identification is a common feature in many video processing systems. This paper proposes two hardware implementations of the OpenCV version of the Gaussian mixture model (GMM), a background identification algorithm. The implemented version of the algorithm allows a fast initialization of the background model while an innovative, hardware-oriented, formulation of the GMM equations makes the proposed circuits able to perform real-time background identification on high definition (HD) video sequences with frame size 1920 × 1080. The first of the two circuits is designed with commercial field-programmable gate-array (FPGA) devices as target. When implemented on Virtex6 vlx75t, the proposed circuit process 91 HD fps (frames per second) and uses 3% of FPGA logic resources. The second circuit is oriented to the implementation in UMC-90 nm CMOS standard cell technology, and is proposed in two versions. Both versions can process at a frame rate higher than 60 HD fps. The first version uses the constant voltage scaling technique to provide a low power implementation. It provides silicon area occupation of 28847 μm2 and energy dissipation per pixel of 15.3 pJ/pixel. The second version is designed to reduce silicon area utilization and occupies 21847 μm2 with an energy dissipation of 49.4 pJ/pixel.
Keywords :
CMOS integrated circuits; Gaussian processes; application specific integrated circuits; field programmable gate arrays; image sequences; mixture models; object detection; video signal processing; ASIC; CMOS standard cell technology; FPGA; GMM equations; Gaussian mixture model algorithm; OpenCV version; hardware implementations; high definition video sequences; real-time segmentation; video processing systems; Application specific integrated circuits; Equations; Field programmable gate arrays; Gaussian distribution; Hardware; Mathematical model; Streaming media; Application-specific integrated circuits (ASICs); computer vision; field programmable gate arrays (FPGAs); image motion analysis; object detection; subtraction techniques;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2013.2249295