A 2.88 mW $+$ 9.06 dBm IIP3 Common-Gate LNA With Dual Cross-Coupled Capacitive Feedback

A CMOS common-gate low noise amplifier (LNA) with dual cross coupled capacitive feedback is proposed. The first feedback loop is designed for transcoductance (g_m) boosting which is widely known as the cross-coupled common gate (CCCG) topology. The other feedback loop is voltage-current feedback by cross-coupling between the drain node and the source node in the common gate topology. In particular, the first feedback loop is able to reduce the amplification of a second-order signal while it boosts the transconductance of a fundamental signal thus, it can reduce the second order harmonic feedback effect to the input-referred third-order intercept point (IIP3) which is one of the major bottlenecks of linearity enhancement using feedback. As the first feedback removes second-order harmonic distortion, the second feedback successfully enhances IIP3. The proposed LNA achieves excellent performance with low power consumption. The LNA is implemented with a 0.13 μm CMOS process and measured. The measurement results demonstrate a gain of 18 dB, a noise figure (NF) of 1.94 dB, an IIP3 of 9.06 dBm, an input matching (S11)/output matching (S22) of less than -10 dB at 900 MHz, and a power consumption of 2.4 mA with 1.2 V supply voltage.