• DocumentCode
    1764489
  • Title

    Graphene Negative Differential Resistance Circuit With Voltage-Tunable High Performance at Room Temperature

  • Author

    Sharma, Pankaj ; Syavoch Bernard, Laurent ; Bazigos, Antonios ; Magrez, Arnaud ; Ionescu, Adrian Mihai

  • Author_Institution
    Nanoelectron. Devices Lab., Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
  • Volume
    36
  • Issue
    8
  • fYear
    2015
  • fDate
    Aug. 2015
  • Firstpage
    865
  • Lastpage
    867
  • Abstract
    We propose, fabricate, and experimentally demonstrate a circuit based on graphene field-effect transistors (GFETs) showing enhanced negative differential resistance (NDR) characteristics at room temperature. The proposed graphene NDR (GNDR) circuit consists of three GFETs, which includes a two GFET inverter connected in a feedback loop with the main GFET in which the NDR is realized. Herein, a GNDR circuit is demonstrated using large-area chemical vapor deposition grown graphene and no doping step, which makes it compatible with silicon-based circuits. The circuit shows negative differential conductance (2.1 mS/μm) that is almost an order of magnitude better than NDR based on 1-GFET. This conductance level is uniquely tunable (×2.3) with the supply voltage as well as with the back bias voltage. It also exhibits an improved peak-to-valley current ratio (2.2) and a wide voltage range (0.6 V) over which NDR is valid. In comparison with other NDR technologies, the GNDR has a very high peak-current-density of the order of 1 mA/μm , which offers unique opportunities for designing circuits for applications requiring high current drive.
  • Keywords
    chemical vapour deposition; field effect transistors; graphene devices; invertors; negative resistance; GNDR circuit; back bias voltage; conductance level; enhanced NDR characteristics; enhanced negative differential resistance characteristics; feedback loop; graphene NDR circuit; graphene field-effect transistors; large-area chemical vapor deposition grown graphene; room temperature; silicon-based circuits; two GFET inverter; voltage 0.6 V; Current density; Graphene; Inverters; Logic gates; Resistance; Silicon; Transistors; Graphene; field effect transistor; graphene; negative differential conductance; negative differential resistance;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2015.2445858
  • Filename
    7124450