Importance Boundary Sampling for SRAM Yield Analysis With Multiple Failure Regions

SRAM cells generally require an extremely low failure rate (i.e., high yield) in the per cell basis to ensure a reasonably moderate yield for the whole chip. Existing yield analysis methods still encounter issues related to multiple failure regions resulting from high-dimensional process parameter space and/or multiple performance specifications. This paper proposes a new method that combines the advantages of existing importance sampling and boundary searching methods, and avoids issues in both. The key idea is to first find all likely failure regions and then, do importance sampling on these regions. Surrogate models are used to further accelerate the method so that SPICE-simulations can be highly reduced. Experimental results show that the proposed method is suitable for handling problems with multiple failure regions. Meanwhile, it can provide 5X ~ 20X speed-up over other existing techniques.