• DocumentCode
    1766715
  • Title

    Entropy and Energy Bounds for Metastability Based TRNG with Lightweight Post-Processing

  • Author

    Suresh, Vikram B. ; Burleson, Wayne P.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA, USA
  • Volume
    62
  • Issue
    7
  • fYear
    2015
  • fDate
    42186
  • Firstpage
    1785
  • Lastpage
    1793
  • Abstract
    On-chip True Random Number Generators (TRNG) are important cryptographic primitives in a variety of applications. In advanced CMOS process technologies, intra-die variations in transistor parameters bias the TRNG and degrade the statistics of the bit stream generated. In this work, we present a stochastic model for metastability based TRNG circuit incorporating both the impact of intra-die variations and thermal noise. The stochastic model is used to estimate the expected entropy out of a TRNG at a given process corner for variations in channel length and threshold voltage. We use the stochastic model to study the impact of variations on three lightweight post-processing techniques: von Neumann corrector, XOR function, and PRESENT cipher. The expected bit rate out of von Neumann corrector, number of XOR stages required for entropy extraction and the number of iterations for using PRESENT encryption are estimated for various process corners using the probabilistic entropy values. These analyses are further extended to different device sizing and operating voltage to explore the optimum trade-off between entropy extraction and energy overhead. A combination of HSPICE circuit simulation using 32 nm Predictive Technology models and stochastic modeling in MatLab show that XOR function and von Neumann corrector have an energy overhead ranging from 0.012pJ/bit to 0.15pJ/bit at the cost of decreased yield and bit-rate respectively. PRESENT cipher provides robust entropy extraction by increasing the number of encryption iterations from 1 for to 3 for . With a maximum of 2.52pJ/bit PRESENT provides a more energy efficient solution compared to AES for entropy extraction in power constrained applications.
  • Keywords
    CMOS integrated circuits; cryptography; entropy; random number generation; stochastic processes; AES; HSPICE circuit simulation; MatLab; PRESENT cipher; PRESENT encryption; XOR function; advanced CMOS process technologies; bit stream; channel length; cryptographic primitives; energy bounds; energy overhead; entropy extraction; intradie variations; lightweight post-processing techniques; metastability based TRNG; on-chip true random number generators; optimum trade-off; power constrained applications; predictive technology models; probabilistic entropy values; size 32 nm; stochastic model; thermal noise; threshold voltage; transistor parameters bias; von Neumann corrector; Entropy; Integrated circuit modeling; Mathematical model; Noise; Stochastic processes; Thermal noise; Transistors; Lightweight post-processing; XOR function; present Cipher; stochastic model; true random number generator; von neumann corrector;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2015.2441966
  • Filename
    7127068