Title :
A scalable FPGA-based architecture for digital controllers and a corresponding rapid prototyping design methodology
Author :
Economakos, Christoforos ; Tzamtzi, Maria ; Economakos, George
Author_Institution :
Dept. of Autom. Eng., Technol. Educ. Instn. of Sterea Ellada, Psahna, Greece
Abstract :
Recent advances in embedded automation applications require quality of results in terms of speed and computational complexity, along with strict time-to-market schedules. To cope with these demands, the design industry is searching for novel approaches. Performance is sought by utilizing modern FPGA devices, offering hundreds of GFLOPs with maximum power efficiency. Productivity is enforced with modern design methodologies like High-Level Synthesis and Electronic System Level design, that offer an efficient abstraction level to boost-up early prototyping. This paper presents a scalable architecture and a corresponding design methodology for the design of digital controllers, as a reference for modern control applications. The advantages of the proposed methodology are: (a) improved performance through hardware acceleration of demanding application cores, (b) improved quality of results with floating point calculations, (c) flexibility and integration of common peripheral devices supported by a RISC microcontroller, (d) low-overhead scalability from single core to multi core architectures and (e) improved designer productivity by working with C level design descriptions only. Experimental results show that the proposed System-on-Chip architecture is an efficient rapid prototyping platform for digital control applications, with very promising future extension capabilities.
Keywords :
CAD; control engineering computing; digital control; field programmable gate arrays; microcontrollers; software prototyping; system-on-chip; C level design descriptions; RISC microcontroller; digital controllers design; electronic system level design; embedded automation applications; field programmable gate arrays; high-level synthesis; multicore architecture; rapid prototyping design methodology; reduced instrucion set controller; scalable FPGA-based architecture; single core architecture; system-on-chip architecture; Computer architecture; Digital signal processing; Field programmable gate arrays; Hardware; Microcontrollers; Performance evaluation; Software; Digital control; FPGAs; electronic system-level design; high-level synthesis; rapid prototyping;
Conference_Titel :
Industrial Electronics (ISIE), 2014 IEEE 23rd International Symposium on
Conference_Location :
Istanbul
DOI :
10.1109/ISIE.2014.6864900